By Topic

Self-Aligned Indium–Gallium–Zinc Oxide Thin-Film Transistor With Source/Drain Regions Doped by Implanted Arsenic

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
Rongsheng Chen ; Dept. of Electron. & Comput. Eng., Hong Kong Univ. of Sci. & Technol., Kowloon, China ; Wei Zhou ; Meng Zhang ; Man Wong
more authors

Self-aligned top-gate amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs) with source/drain (S/D) regions doped by implanted arsenic are developed in this letter. The resulting a-IGZO TFTs exhibit much better thermal stability than those with S/D regions doped by hydrogen or argon plasma. They also show good electrical performance, including field-effect mobility of 12 cm2/V·s, threshold voltage of 3.5 V, subthreshold swing of 0.5 V/dec, and on/off current ratio of 9 ×107.

Published in:

Electron Device Letters, IEEE  (Volume:34 ,  Issue: 1 )