Skip to Main Content
An LED circuit of a cell phone is analyzed using the System-Efficient-ESD-Design (SEED) methodology. The method allows simulation of the ESD current path, and the interaction mechanisms between the clamp and the on-chip ESD protection circuit. The I-V curve and the non-linear behavior under high current pulses of every component including R, L, C, and ferrite beads are measured and modeled. By combining all of the component models, a complete circuit model is built for predicting the circuit behavior and damaging threshold at a given setting-voltage of a Transmission Line Pulser (TLP).
Date of Conference: 6-10 Aug. 2012