Referenced Items are not available for this document.
We report the processing and DC and microwave characteristics of a novel thin-film silicon-on-sapphire MOS transistor which utilizes a sidewall process to realize a deep sub-micron gate length without the use of lithography. The device also incorporates an asymmetric lightly doped drain region for high breakdown voltage. Devices with 0.15 and 0.25 μm gate lengths have been fabricated. A FET with a 0.25 μm gate length and 1.0 μm LDD length had an ft=9 GHz, fmax=27 GHz and breakdown voltage of 13 volts
Published in:
SOI Conference, 1997. Proceedings., 1997 IEEE International
Date of Conference: 6-9 Oct 1997
- Page(s):
- 136 - 137
- Meeting Date :
- 06 Oct 1997-09 Oct 1997
- ISSN :
- 1078-621X
- Print ISBN:
- 0-7803-3938-X
- INSPEC Accession Number:
- 5842404
- Conference Location :
- Fish Camp, CA
- Digital Object Identifier :
- 10.1109/SOI.1997.634970
- Product Type:
- Conference Publications
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