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Performance evaluation of a proposed gate drive circuit for normally-ON SiC JFETs used in PV inverter applications

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3 Author(s)
Giannoutsos, S.V. ; Sch. of Electr. & Comput. Eng., Nat. Tech. Univ. of Athens (NTUA), Athens, Greece ; Pachos, P. ; Manias, S.N.

Depletion mode (DM) silicon carbide JFETs are considered very promising switching semiconductor devices for demanding high power and high temperature PV inverter applications. This paper presents an original gate drive circuit for normally-ON SiC JFETs based on the equivalent model and the characteristic parameters of the device. The gate drive provides excellent device switching performance and offers protection against coupled noise induced shoot-through and gate punch-through faults. The gate-to-drain interaction effects are minimized, leading to limited overshoots in drain-to-source voltage as well as in drain current. Experimental results in an inverter bridge leg configuration verify the effectiveness of the gate drive towards improving the switching performance of the device. It is also shown that the device intrinsic body diode can be used for free-wheeling operation at the cost of a high voltage drop.

Published in:

Energy Conference and Exhibition (ENERGYCON), 2012 IEEE International

Date of Conference:

9-12 Sept. 2012