By Topic

Hybrid-on-chip communication architecture for dynamic MP-SoC protection

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
Sepulveda, J. ; Microelectron. Lab. LME, Univ. of Sao Paulo, Sao Paulo, Brazil ; Gogniat, G. ; Pires, R. ; Chau, W.J.
more authors

MPSoCs are able to support multiple applications on the same chip. This flexibility also represents a vulnerability, turning the MPSoC security specially challenging. Most of the current MPSoCs security services are based on symmetric and public-key cryptographic mechanisms. So that, MPSoCs integrate a large set of keys that must be exchanged in an efficient and secure way. In such scenario, any security concept will be ineffective if the key management is weak. In this paper, we present the implementation of an on-chip hybrid communication (HoCs) security-based architecture, that combines bus and Network-on-chip (NoC), to address the efficient and secure key management at MPSoCs. The HoC implements dynamically the QoSS (Quality of Security Service) concept that allows the customization of security. We evaluate the effectiveness of our approach over several MPSoCs attack scenarios and estimate their impact on the overall performance. We show that our architecture can perform a fast detection of a wide range of attacks and a fast configuration of the different security policies for several MPSoC applications. Our hybrid approach saves upto 16% and 25% of communication latency and power consumption, respectively, when compared to the NoC-based architecture without any security.

Published in:

Integrated Circuits and Systems Design (SBCCI), 2012 25th Symposium on

Date of Conference:

Aug. 30 2012-Sept. 2 2012