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Design and Architectural Assessment of 3-D Resistive Memory Technologies in FPGAs

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8 Author(s)
Pierre-Emmanuel Gaillardon ; Lab. of Syst. Integration, Ecole Polytech. Fed. de Lausanne, Lausanne, Switzerland ; Davide Sacchetto ; Giovanni Betti Beneventi ; M. Haykel Ben Jamaa
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Emerging nonvolatile memories (eNVMs) such as phase-change random access memories (PCRAMs) or oxide-based resistive random access memories (OxRRAMs) are promising candidates to replace Flash and Static Random Access Memories in many applications. This paper introduces a novel set of building blocks for field-programmable gate arrays (FPGAs) using eNVMs. We propose an eNVM-based configuration point, a look-up table structure with reduced programming complexity and a high-performance switchbox arrangement. We show that these blocks yield an improvement in area and write time of up to 3× and 33×, respectively, versus a regular Flash implementation. By integrating the designed blocks in an FPGA, we demonstrate an area and delay reduction of up to 28% and 34%, respectively, on a set of benchmark circuits. These reductions are due to the eNVM 3-D integration and to their low on-resistance state value. Finally, we survey many flavors of the technologies and we show that the best results in terms of area and delay are obtained with Pt/TiO2/Pt stack, while the lowest leakage power is achieved by InGeTe stack.

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IEEE Transactions on Nanotechnology  (Volume:12 ,  Issue: 1 )