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A channel-recessed multifunctional memory (MFM) device was investigated, and a dual read method using a capacitance coupling effect was developed. The nonvolatile memory (NVM) cells using a SiO2/Si3N4/SiO2 gate insulator and the high-speed single-transistor dynamic random access memory (1T-DRAM) cells using a floating-body effect of an SOI substrate were demonstrated in the single-channel-recessed MFM cells. In order for the layer to avoid the interference of operations between NVM and 1T-DRAM modes, a dual read method using the capacitance coupling effect between a front-gate oxide layer and a back-gate oxide was examined. As a result, a large memory window of NVM operation was accomplished by using the back-gate read operation. Furthermore, the reliability of both NVM and 1T-DRAM operations was improved, and the interferences of operation mode between NVM and 1T-DRAM were effectively suppressed.