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A 19 nm 112.8 mm ^{2} 64 Gb Multi-Level Flash Memory With 400 Mbit/sec/pin 1.8 V Toggle Mode Interface

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32 Author(s)
Kanda, K. ; Toshiba Corp., Yokohama, Japan ; Shibata, N. ; Hisada, T. ; Isobe, K.
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A 64 Gb MLC NAND flash memory in 19 nm CMOS technology has been developed. By adopting one-sided all bit line (ABL) architecture, the single cell array configuration, bit line bias acceleration (BLBA) and BC states first program algorithm, the smallest 64 Gb die size in 2 bit/cell is achieved with high performance of 15 MB/s program throughput. Program suspend and erase suspend functions are introduced to improve the read latency. High speed toggle mode interface of 400 Mbit/sec/pin at VCCQ = 1.8 V is also realized.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:48 ,  Issue: 1 )

Date of Publication:

Jan. 2013

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