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Using Direct Cache Access Combined with Integrated NIC Architecture to Accelerate Network Processing

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4 Author(s)
Wen Su ; Key Lab. of Comput. Syst. & Archit., Beijing, China ; Longbing Zhang ; Dan Tang ; Xiang Gao

As network speed continues to grow, new challenges of network processing are emerging. In this paper, we first study the overheads and interactions among the different steps of networking from a hardware perspective and point out that I/O and related memory have become the main bottlenecks of performance promotion. Then based on the analysis, we show that conventional optimizing solutions are insufficient due to architecture limitations. Motivated by the studies, we propose an improved Direct Cache Access (DCA) scheme combined with Integrated NIC architecture, which includes innovative architecture, optimized data transfer scheme and improved cache policy. Experimental results demonstrate that our solution improves about 26.3% network bandwidth and reduces 42.8% and 14.3% cycles on average for receiving and transmitting respectively. Also I/O and memory traffics are significantly decreased. Moreover, we investigate the I/O and cache behaviors for network processing and present some conclusions about the DCA method.

Published in:

High Performance Computing and Communication & 2012 IEEE 9th International Conference on Embedded Software and Systems (HPCC-ICESS), 2012 IEEE 14th International Conference on

Date of Conference:

25-27 June 2012