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Incremental Run-time Application Mapping for Heterogeneous Network on Chip

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3 Author(s)
Jingcheng Shao ; Dept. of Comput. Sci. & Technol., Zhejiang Univ., Hangzhou, China ; Chen Tian-zhou ; Li Liu

Multiple heterogeneous processor systems on chip are more and more widely used in order to provide a higher system performance. Run-time mapping for heterogeneous Network on Chip (NoC) is challenging since the sequence of the incoming applications is unknown in advance. This paper presents Heterogeneous Near Convex Region Algorithm (HNCR), an incremental run-time mapping algorithm for heterogeneous NoC. Novel application description and energy model are introduced for heterogeneous NoC. We adjust the idea of near convex region to fit the need of heterogeneous mapping. Experimental results show that HNCR gains 16.7% and 60.5% average reductions in network latency compared to greedy and random solutions, together with 17.9% and 54.9% average reductions in communication energy only at the cost of a slight increase in total execution time. The experiments also show the extensibility of our scheme under different injecting rates and traffic distribution models.

Published in:

High Performance Computing and Communication & 2012 IEEE 9th International Conference on Embedded Software and Systems (HPCC-ICESS), 2012 IEEE 14th International Conference on

Date of Conference:

25-27 June 2012

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