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A mixed-mode FPAA SoC for analog-enhanced signal processing

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4 Author(s)
Schlottmann, C. ; Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA ; Nease, S. ; Shapero, S. ; Hasler, P.

We present the RASP 2.9v, an FPAA for mixed-signal computation with an emphasis on enhanced digital support. This 25mm2, 350nm CMOS chip includes on-chip compilable DACs, dynamic reconfigurability and digital storage, and 76,000 programmable elements. We demonstrate an analog image-transform processor, an arbitrary waveform generator, and a mixed-mode FIR filter.

Published in:

Custom Integrated Circuits Conference (CICC), 2012 IEEE

Date of Conference:

9-12 Sept. 2012