By Topic

A 100 MHz two-phase four-segment DC-DC converter with light load efficiency enhancement in 0.18 μm CMOS technology

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Han Peng ; GE Global Research Center, 1 Research Circle, Niskayuna, NY 12309, USA ; David I Anderson ; Mona M. Hella

A two-phase four-segment DC-DC converter with novel coupled-inductors output network utilizing phase shedding and phase segmentation is presented for light load efficiency enhancement. The coupled inductor network increases the effective inductance value and reduces inductor current ripple. To improve light load efficiency, resonant gate drivers are employed to reduce driver losses. The DC-DC converter is implemented in 0.18 μm six-metal CMOS technology with 5 V devices, and occupies a total area of 7.77 mm2. The converter achieves a peak efficiency of 77.8% at 6 W output with 5% efficiency improvement at 1 V output due to the use of resonant gate drivers. Furthermore, with phase shedding, the converter maintains peak efficiency as the output current varies from 0.1 A to 1.86 A.

Published in:

Proceedings of the IEEE 2012 Custom Integrated Circuits Conference

Date of Conference:

9-12 Sept. 2012