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A 4.8mW inductorless CMOS frequency divider-by-4 with more than 60% fractional bandwidth up to 70GHz

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4 Author(s)
Ghilioni, A. ; Dipt. di Ing. Ind. e dell''Inf., Univ. degli Studi di Pavia, Pavia, Italy ; Decanis, U. ; Mazzanti, A. ; Svelto, F.

Frequency synthesizers at mm-waves would benefit from wide-band low-power dividers with large division factors. This work proposes a divider-by-4 based on clocked differential amplifiers working as dynamic CML latches. The clock modulates both the tail current and the load resistance of the differential pair, allowing a wide locking range. Prototypes, realized in 32nm CMOS, operate between 14GHz and 70GHz demonstrating a fractional bandwidth in excess of 60% in the entire range, 4.8mW of maximum power consumption and 55×18μm2 occupied area.

Published in:

Custom Integrated Circuits Conference (CICC), 2012 IEEE

Date of Conference:

9-12 Sept. 2012