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The importance and difficulty of acquiring analog-to-digital converter (ADC) dynamic data during heavy ion bombardment has been outlined. Testing of some modern-day ADCs is further complicated when they have their own on-board RAM, latches and/or microcontroller. ADC testing is no longer a matter of inputing a fixed analog voltage and monitoring the digital output for change. The Crystal CS5327 16-bit CMOS ADC described here is an example of one of these complex parts, requiring development of new testing techniques. The CS5327 ADC created some very interesting problems for SEE testing. In a conventional successive approximation register (SAR) or Flash ADC each single event upset (SEU) would affect only one sample at a time because these types of ADCs process only one sample at a time. However, the CS5327 is a delta-sigma modulator ADC, which includes a digital signal processor (DSP) to improve performance. The DSP compensates for input offset and provides digital filtering of the sampled input. In this type of device a single SEU can affect all subsequent data outputs if, for example the heavy ion strike occurs in the calibration RAM, or the state machine. This effect implies that the test conditions may have to be modified in real time during exposure to the beam.