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Detecting bridging faults in dynamic CMOS circuits

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2 Author(s)
Chang, J.T.-Y. ; Center for Reliable Comput., Stanford Univ., CA, USA ; McCluskey, E.J.

New methods for detecting bridging faults in dynamic CMOS circuits are proposed. We show that resistive shorts in CMOS dynamic circuits can cause intermittent failures and reliability problems. We found that the defect coverage of resistive shorts, which we defined as the maximum detectable resistance of a short, in CMOS domino gates, can be improved by increasing the supply voltage to be about 40% higher than the normal operating voltage or by reducing the supply voltage to about 2V/sub t/, where V/sub t/ is the threshold voltage of a transistor.

Published in:
IDDQ Testing, 1997. Digest of Papers., IEEE International Workshop on

Date of Conference: 5-6 Nov. 1997

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