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A single-photon avalanche diode (SPAD) is reported in a 130-nm CMOS imaging process which achieves a peak photon detection efficiency (PDE) of ≈72% at 560 nm with >; 40% PDE from 410 to 760 nm. This is achieved by eliminating junction isolation, utilizing dielectric stack optimizations designed for CMOS imaging, and operating at high bias enabled by ac coupling. The 8-μm-diameter device achieves a low median dark count rate of 18 Hz at 2-V excess bias (VEB), a <; 60-ps FWHM timing resolution at 654 nm from VEB = 6 V to VEB = 12 V, and a <; 4% after-pulsing probability. This represents performance which is comparable to fully customized discrete SPADs.