Referenced Items are not available for this document.
Faced with the task of developing a complex 0.5-μm digital demodulator/decoder, Motorola engineers developed a new design process based on reusable cores. Incorporating design, logic synthesis, and placement-and-routing tools in an automated environment, this methodology greatly reduces cycle time for complex deep-submicron designs
Published in:
Design & Test of Computers, IEEE
(Volume:14
,
Issue:
4
)
Date of Publication: Oct-Dec 1997
- Page(s):
- 36 - 41
- ISSN :
- 0740-7475
- INSPEC Accession Number:
- 5783310
- Digital Object Identifier :
- 10.1109/54.632879
- Date of Current Version :
- 06 August 2002
- Issue Date :
- Oct-Dec 1997
- Sponsored by :
- IEEE Council on Electronic Design and Automation
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