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An integrate-and-dump receiver based on an active feedback integrator is demonstrated in a 45-nm SOI CMOS process. The integrate-and-dump receiver provides matched filtering for non-return-to-zero, return-to-zero, and pulse amplitude modulation digital modulation formats, resulting in high SINAD as well as inherent anti-aliasing/low-pass filtering for a 2 GS/s high linearity/high-dynamic-range optical sampling receiver. The measured SINAD is greater than 28 dBc with a sinusoidal input up to 1 GHz; the SNR is greater than 29 dBc. The 2-GS/s integrate-and-dump receiver consumes less than 100 mW. The chip area is 0.980×0.762 mm2 including the pads.