Referenced Items are not available for this document.
This paper describes and illustrates the standard cell approach for generating low-cost, quick-turnaround, custom, random logic LSI and VLSI devices using the CMOS/SOS technology. Special features of the automatic layout program that provide increased performance, speed, and density will be highlighted and illustrated in various LSI devices into which these features have been designed.
Published in:
Circuits & Systems Magazine
(Volume:3
,
Issue:
3
)
Date of Publication: Sept. 1981
- Page(s):
- 9 - 13
- ISSN :
- 0163-6812
- INSPEC Accession Number:
- 1766836
- Digital Object Identifier :
- 10.1109/MCAS.1981.6323756
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 05 October 2012
- Issue Date :
- Sept. 1981
About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies
A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.
