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A low-power fully-integrated CMOS RF front-end circuit for a passive 13.56 MHz biomedical implant is presented. A 13.56 MHz binary phase shift keying (BPSK) signal is received by an internal coil. This front-end circuit is composed of a full-wave bridge rectifier, a linear regulator, a BPSK demodulator, and a clock/data recovery (CDR). A full-wave bridge rectifier converts the carrier waveform with the BPSK signal to an unregulated DC voltage. A linear regulator stabilizes the unregulated DC voltage to 1.8 V that serves as the DC source for the implant. A BPSK demodulator detects the incoming BPSK signal from the internal coil and translates the demodulated data to the CDR which can successfully recover the clock and data for the system controller. This chip with a core area of 0.45 mm2 has been fabricated in a TSMC 0.18 μm 1P6M CMOS technology. The total power consumed is only 632 μW.