By Topic

Terabit/Sec VCSEL-Based 48-Channel Optical Module Based on Holey CMOS Transceiver IC

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

The purchase and pricing options are temporarily unavailable. Please try again later.
8 Author(s)
Doany, F.E. ; IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA ; Lee, B.G. ; Kuchta, D.M. ; Rylyakov, A.V.
more authors

We report here on the design, fabrication and characterization of 48-channel parallel optical transceivers demonstrating terabit/sec data transfer rate. The 0.48 Tb/s transmit plus 0.48 Tb/s receive throughput was achieved using a second-generation single-chip holey CMOS transceiver IC. In addition to 24 receiver (RX) and 24 laser diode driver circuits, the 5.2 mm × 5.8 mm single CMOS chip incorporates 48 through-substrate optical vias (holes), one for each transmitter (TX) and RX channel. A complete holey Optochip is formed following direct flip-chip attachment of 24-channel 850-nm VCSEL and PD arrays. The 48 optical vias enable optical access to the 24 VCSELs and 24 PDs. The holey Optochip concept provides a dense chip-scale package which is fully compatible with industry-standard top emitting/detecting 850-nm VCSELs/PDs providing optimized high-speed performance through close integration of the optoelectronic (OE) devices with their drive electronics. Furthermore, the optical vias and OE devices are arranged in a 4 × 12 array on 250 μm × 250 μ m pitch to facilitate direct fiber-coupling to a standard 4 × 12 multi-mode fiber array. The Optochips are packaged into complete modules by flip-chip soldering to high-density, high-speed organic carriers. A pluggable connector soldered to the bottom of the carrier provides all module electrical I/O. The 18 mm × 18 mm overall module area is dictated by the 0.8 mm-pitch ball grid array (BGA) of the organic carrier and connector. Fully functional holey Optomodules with 24 TX and 24 RX channels operate up to 20 Gb/s/ch achieving efficiencies (including both TX and RX) of 7.3 pJ/bit. The terabit/sec data rate (480 Gb/s TX + 480 Gb/s RX) is highest reported for single-chip CMOS transceiver modules.

Published in:

Lightwave Technology, Journal of  (Volume:31 ,  Issue: 4 )