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Incorporating manufacturing objectives into the semiconductor facility layout design process: A methodology and selected cases

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3 Author(s)
Padillo, J.M. ; TEFEN, Tempe, AZ, USA ; Meyersdorf, D. ; Reshef, O.

This paper presents a methodology that provides a vehicle for the selection and ranking of layout design objectives. Moreover, the same methodology can be used to create a decision matrix to evaluate different alternative layouts under analysis. In this case, the methodology combines the ranking of the layout objectives with the relative performance of each layout alternative along each objective in order to recommend the “best” layout alternative. This structured methodology is based on a decision making tool known as the Analytical Hierarchy Process (AHP). These concepts are illustrated through several case studies taken from actual layout design projects in the semiconductor manufacturing industry

Published in:

Advanced Semiconductor Manufacturing Conference and Workshop, 1997. IEEE/SEMI

Date of Conference:

10-12 Sep 1997