By Topic

Resistive extraction of polysilicon gate linewidth

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Miles, G. ; IBM Microelectron. Div., Essex Junction, VT, USA ; Hook, T. ; Faucher, M. ; Morrett, K.

The polysilicon gate linewidth manufacturing control strategy typically includes an electrical resistance measurement to extract the gate dimension. The extraction method usually assumes that wide (reference) and narrow (gate dimension) resistors have the same absolute sheet resistance. However, upon deeper examination, we found that this assumption is frequently invalid, submicron resistors do not necessarily have the same sheet resistance as wide resistors. Moreover, N-type and P-type narrow resistors exhibit quite divergent behaviors

Published in:

Advanced Semiconductor Manufacturing Conference and Workshop, 1997. IEEE/SEMI

Date of Conference:

10-12 Sep 1997