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Development of cost effective sampling strategy for in-line monitoring

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4 Author(s)
Tomlinson, W. ; IBM Corp., Burlington, VT, USA ; Nurani, R.K. ; Burns, M. ; Shanthikumar, J.G.

This paper presents the details of a study undertaken at the IBM wafer fabrication facility to determine the optimal in-line inspection sampling plan for poly process module. During the study several lots at multiple processing points were inspected. The data was collected and analyzed to characterize the process baseline and excursions. This was then used to determine the cost of current sampling plan and what the best sampling plan would be to both minimize risk to the product and minimize cost of doing inspections. The optimal sample plan was then modified to also minimize the cycle time through the inspection process. We also present the results of a new SPC model which explicitly accounts for the lot-to-lot and wafer-to wafer variations. We illustrate that the application of traditional policies could increase the “lots-at-risk” by as much as 17%

Published in:

Advanced Semiconductor Manufacturing Conference and Workshop, 1997. IEEE/SEMI

Date of Conference:

10-12 Sep 1997