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Real-time scheduling in a programmable radar signal processor

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4 Author(s)
Cheng Chang ; Chung Shan Inst. of Sci. & Technol., Lung-Tan, Taiwan ; Chien-Chung Chen ; Yao-Liang Chen ; Fu-Shin Huang

The new trend of designing radar digital signal processors is not only to improve their processing speed by adopting the parallel multi-processor architecture but also to make their infrastructure flexible so that one generic digital signal processor framework can be applied to a variety of different radar systems. The key technology to make such radar digital signal processor architecture programmable, or flexible, is the scheduler which manages resources of digital signal processing in real-time according to system requirements. In this paper, the architecture of the programmable radar signal processor (PRSP) is presented, and a real-time scheduling algorithm used in PRSP is thoroughly discussed

Published in:

Real-Time Computing Systems and Applications, 1997. Proceedings., Fourth International Workshop on

Date of Conference:

27-29 Oct 1997

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