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Compact low-voltage CMOS analog divider using a four-quadrant multiplier and biasing control circuit

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1 Author(s)
Ivan Padilla-Cantoya ; Departamento de Electronica, Sistemas e Informatica DESI, Instituto Tecnologico y de Estudios Superiores de Occidente ITESO, Tlaquepaque, Jalisco, Mexico

A compact low-voltage analog divider is presented. The design is based on a four-quadrant multiplier and a differential transconductance amplifier as basic building blocks operating in voltage mode. A biasing control circuit to set the dc operational point that requires very few devices and offers continuous-time operation is included. Experimental results of a test chip in 0.5μm CMOS technology verify the proposed operation.

Published in:

2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS)

Date of Conference:

5-8 Aug. 2012