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Corrections to “Copper Anisotropy Effects in Three-Dimensional Integrated Circuits Using Through-Silicon Vias” [Jun 12 225-232]

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4 Author(s)
Karmarkar, A. P. ; Synopsys (India) Private Ltd., Hyderabad, India ; Xu, X. ; Yeap, K.-B. ; Zschech, E.

In the above titled paper (ibid., vol. 12, no. 2, pp. 225-232, June 2012), Fig. 1 did not appear correctly. The corrected Fig. 1 is presented here.

Published in:

Device and Materials Reliability, IEEE Transactions on  (Volume:12 ,  Issue: 3 )