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Design of inter processor communication controller using ATM switch and analysis of its optimal message length considering retransmission

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5 Author(s)
Hea-Sook Park ; Process Dev. Sect., Electron. & Telecommun. Res. Inst., Taejon, South Korea ; Sung-Jin Moon ; Man-Sik Park ; Boseob Kwon
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This paper describes the design of inter processor communication (IPC) controller which transmits message between distributed large-scale multiprocessors through asynchronous transfer mode (ATM) switches. Its hardware mainly comprised of a transmitting section, in which messages are decomposed into cells, and a receiving section, in which cells are assembled into messages; while its software is comprised of an interface section with the upper application program and a driver section for driving IPC control device. The IPC controller is doubly designed in order to provide with continuous services for the system, and upgrading and change of software and operating system are possible without having the system down. ATM adaptation layer (AAL) type 5 is used for the format of IPC messages. IPC header information as well as additional information for routing of ATM switch are also used. This paper also presents characteristics of and requirements for IPC through ATM switch, and computes message error rate, message retransmission rate for varying user message size. Finally, this paper derives the equation of the optimal message length considering retransmission

Published in:

Real-Time Computing Systems and Applications, 1997. Proceedings., Fourth International Workshop on

Date of Conference:

27-29 Oct 1997