By Topic

Implementation and validation of a new thermal model for analysis, design and characterisation of multichip power electronics devices

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Profumo, F. ; Dipt. di Ingegneria Elettrica, Bologna Univ., Italy ; Facelli, S. ; Tenconi, A. ; Passerini, B.

The goal of this paper is to present a new electro-thermal model for analysis, design and characterisation of multichip power electronics devices. The feature of this model is that it allows the junction temperature calculation for devices in which several chips are thermally interacting. In the first part of the paper the thermal and electrical parameters and submodels used for the simulation are described. Thus, the calculation procedure that allows determination of the chips temperature is illustrated. In the second part of the paper, some results related to a practical application for which the model has been used and the experimental validation of the model are presented

Published in:

Industry Applications Conference, 1997. Thirty-Second IAS Annual Meeting, IAS '97., Conference Record of the 1997 IEEE  (Volume:2 )

Date of Conference:

5-9 Oct 1997