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Implementation and validation of a new thermal model for analysis, design and characterisation of multichip power electronics devices

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4 Author(s)
F. Profumo ; Dipt. di Ingegneria Elettrica, Bologna Univ., Italy ; S. Facelli ; A. Tenconi ; B. Passerini

The goal of this paper is to present a new electro-thermal model for analysis, design and characterisation of multichip power electronics devices. The feature of this model is that it allows the junction temperature calculation for devices in which several chips are thermally interacting. In the first part of the paper the thermal and electrical parameters and submodels used for the simulation are described. Thus, the calculation procedure that allows determination of the chips temperature is illustrated. In the second part of the paper, some results related to a practical application for which the model has been used and the experimental validation of the model are presented

Published in:

Industry Applications Conference, 1997. Thirty-Second IAS Annual Meeting, IAS '97., Conference Record of the 1997 IEEE  (Volume:2 )

Date of Conference:

5-9 Oct 1997