Towards an integrated circuit design of a compresssed sampling wireless receiver

In this paper, we investigate the extension of previous work on compressed sampling receivers from mathematical abstractions and proof of concept work into a system that directly competes with more traditional receivers in standard CMOS integrated circuit technology. As developed in the literature, the Modulated Wideband Converter shows great promise as a compressed sampling receiver due to its flexibility and inherent spectral agility. We propose several modifications to the system that improve its usability and performance in real-world scenarios. Then, using standard LTE receivers as a basis for comparison, we propose a set of target specifications for the Modulated Wideband Converter, discuss the associated circuit challenges, and evaluate potential solutions that build upon prior work in integrated circuit and system design.