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Vector restoration based static compaction of test sequences for synchronous sequential circuits

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2 Author(s)
Pomeranz, I. ; Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA ; Reddy, S.M.

The authors propose a new procedure for static compaction that belongs to the class of procedures that omit test vectors from a given test sequence in order to reduce its size without reducing the fault coverage. The previous procedures that achieved high levels of compaction using this technique attempted to omit test vectors from a given test sequence one at a time or in consecutive subsequences. Consequently, the omission of each vector or subsequence required extensive simulation to determine the effects of each vector omission on the fault coverage. The proposed procedure first omits (almost) all the test vectors from the sequence, and then restores some of them as necessary to achieve the required fault coverage. The decision to restore a vector requires simulation of a single fault. Thus, the overall computational effort of this procedure is significantly lower. The loss of compaction compared to the scheme that omits the vectors one at a time or in subsequences is small in most cases. Experimental results are presented to support these claims

Published in:

Computer Design: VLSI in Computers and Processors, 1997. ICCD '97. Proceedings., 1997 IEEE International Conference on

Date of Conference:

12-15 Oct 1997

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