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A 10-bit 80 MHz 3.0 V CMOS D/A converter for video applications

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3 Author(s)
Moonsik Song ; Syst. LSI Bus., Samsung Electron., South Korea ; Bongsoon Kang ; Joe, E.

A low-voltage, high-speed, and high-resolution CMOS D/A converter is implemented using an improved unique switching sequence to reduce integral linearity error (ILE) in the output of current cells, and a novel segmented layout technique to minimize both current asymmetry due to drain current directions and voltage drop due to power line resistance. The D/A converter has been fabricated by using 0.65 μm CMOS process. The differential linearity error (DLE) is 0.37 LSB and the ILE is 0.87 LSB. It occupies a die area of 700×800 μm2 and operates up to 80 MHz with 3.O V

Published in:

Consumer Electronics, IEEE Transactions on  (Volume:43 ,  Issue: 3 )

Date of Publication:

Aug 1997

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