Referenced Items are not available for this document.
Identifying and eliminating yield limiting factors is a critical requirement for achieving accelerated yield improvement rates. This paper presents a systematic methodology for identifying yield problems caused by manufacturing equipment in a semiconductor process. The method uses Multiple Die Yield Analysis methodology to decompose the probe yield into two major components: a non-random systematic yield Ys , and a random yield Yr. Systematic or random yield loss problems caused by process equipment are identified based on the analysis of the statistical significance on Ys and Yr between the highest yield equipment and all other equipment in the same process step. Applications of the proposed analysis method to many manufacturing lines' data have been very successful in identifying process equipment related yield problems
Published in:
Defect and Fault Tolerance in VLSI Systems, 1997. Proceedings., 1997 IEEE International Symposium on
Date of Conference: 20-22 Oct 1997
- Page(s):
- 69 - 73
- Meeting Date :
- 20 Oct 1997-22 Oct 1997
- ISSN :
- 1550-5774
- Print ISBN:
- 0-8186-8168-3
- INSPEC Accession Number:
- 5801660
- Conference Location :
- Paris
- Digital Object Identifier :
- 10.1109/DFTVS.1997.628311
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