Wideband CMOS Amplification Stage for a Direct-Sampling Square Kilometre Array Receiver

The design of a second amplification stage (SAS) for a highly sensitive direct-sampling receiver for the Square Kilometre Array (SKA) radio synthesis telescope is discussed. The SAS is intended to follow a Square Kilometre Array low-noise amplifier (SKA-LNA), which is being designed by others and is not a subject of this study, to obtain the high gain required from the SKA receiver. Due to the SKA ultra-low noise-temperature requirements, the SAS noise must be minimized, even though it is preceded by an SKA-LNA. The first two stages of the SAS consist of an inductorless partially noise-canceling resistive-feedback amplifier and a differential gain stage that achieve both low noise figures (NFs) and convert the single-ended input signal to a differential output. Following this, an additional gain stage is cascaded to increase the SAS gain. Over the midband SKA frequency range of 0.7-1.4 GHz, a 65-nm CMOS SAS achieves an S₂₁ >; 34 dB, voltage gain >;36 dB, and sub-1-dB NFs (~75-K noise temperature), P1dB of >; -52 dBm, input third-order intercept point (IP3) of >;-43 dBm and input second-order intercept point (IP2) of >;-34 dBm, while consuming 96.8 mW of dc power. While the proposed SAS is not required to be input power matched, a method for matching with minimum effect on NF and gain is also presented and experimentally verified. The power match SAS achieves an S₂₁>;26dB, voltage gain >;35 dB, and sub-1.6-dB NFs (~130-K noise temperature), input P1dB of >;-52 dBm, input IP3 of >;-44 dBm, and input IP2 of >;-34 dBm, while consuming 58.9 mW of dc power.