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Compact Modeling of a Generic Double-Gate MOSFET With Gate–S/D Underlap for Subthreshold Operation

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3 Author(s)
Vaddi, R. ; ECE Dept., Padmashri Dr. B.V. Raju Inst. of Technol., Hyderabad, India ; Agarwal, R.P. ; Dasgupta, S.

In this brief, a new analytical model to compute the potential distribution in gate overlap and underlap regions of a generic double-gate (DG) MOSFET (valid for asymmetric features in front- and back-gate insulator thicknesses, gate bias, and gate work functions) for operation in the subthreshold condition is proposed. A closed form solution to 2-D Poisson's equation is obtained with approximation of parabolic potential function along vertical direction of the device. Conformal mapping technique is applied for modeling fringe electric field in the underlap regions. The proposed potential model is extended in deriving important device parameters such as threshold voltage, threshold voltage rolloff, DIBL, subthreshold swing, etc. Model predictions demonstrate that significant improvement in subthreshold operation can be achieved with 4T asymmetric underlap DG MOSFETs in comparison to 3T symmetric nonunderlap DG MOSFETs.

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Electron Devices, IEEE Transactions on  (Volume:59 ,  Issue: 10 )