By Topic

Low latency design of Depth-Image-Based Rendering using hybrid warping and hole-filling

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Shen-Fu Hsiao ; Dept. of Comput. Sci. & Eng., Nat. Sun Yat-sen Univ., Kaohsiung, Taiwan ; Jin-Wen Cheng ; Wen-Ling Wang ; Guan-Fu Yeh

A low-latency design of Depth-Image-Based Rendering (DIBR) stereoscopic image generation hardware is presented. We propose a new algorithm that performs the operations of warping and hole-filling in parallel so that the overall computation latency is significantly reduced. Furthermore, two new approaches, “raised disparity around edge” and “horizontal mirroring” are employed to reduce visual artifacts of synthesized virtual images. Experimental results show that the new design can effectively reduce the computation time and improve the synthesized image quality compared to previous DIBR designs.

Published in:

Circuits and Systems (ISCAS), 2012 IEEE International Symposium on

Date of Conference:

20-23 May 2012