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One of the main obstacles delaying a more widespread use of radio frequency identification (RFID) tags is cost. A critical element of any RFID system is a low power embedded non-volatile memory (NVM) that can be fabricated without additional masks to the core CMOS process. In this paper, we present a 256-bit re-writeable NVM array, implemented in the TowerJazz 0.18µm CMOS process using only standard logic process steps and masks. Based on the single-poly C-Flash bitcell, this array achieves an extremely low static power figure of 3.8µW during operation cycles.