By Topic

Hardware-software co-simulation of a parallel computer system

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Shome, T. ; Dept. of Electr. & Comput. Eng., Manitoba Univ., Winnipeg, Man., Canada ; McLeod, R.D.

In this paper the hardware/software co-simulation results (Gajski et al., 1992) of a four node single-bus based multicomputer architecture are presented. The application used to illustrate the co-simulation is a parallel matrix multiplication algorithm. The objective is to illustrate the trade-offs and improvements in design that can be made within a co-simulation environment

Published in:

WESCANEX 97: Communications, Power and Computing. Conference Proceedings., IEEE

Date of Conference:

22-23 May 1997