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The comparative analysis of the efficiency of regular and pseudo-optimal topologies of networks-on-chip based on Netmaker

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2 Author(s)
Romanov, O. ; Dept. of Design of Electron. Digital Equip., Nat. Tech. Univ. of Ukraine, Kiev, Ukraine ; Lysenko, O.

The different approaches to the optimization of network communication subsystem on a chip are considered. The regular and pseudo-optimal topologies with 9 nodes, using System Verilog library Netmaker are modeled. It is shown, that the pseudo-optimal topologies are highly efficient for the cases of network design with the number of nodes and connecting lines not achieved, when using typical regular topologies.

Published in:

Embedded Computing (MECO), 2012 Mediterranean Conference on

Date of Conference:

19-21 June 2012