By Topic

The SoCWire protocol (SoCP): A flexible and minimal protocol for a Network-on-Chip

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

8 Author(s)
Michel, H. ; IDA TU Braunschweig, Braunschweig, Germany ; Belger, A. ; Bubenhagen, F. ; Fiethe, B.
more authors

State of the art radiation tolerant SRAM-based FPGAs with large gate count offer powerful processing capability among devices qualified for space applications. Due to changing mission requirements the processing in a space instrument needs to be adaptable. Modern SRAM-based FPGAs can be partially and dynamically reconfigured and thereby offer a method of adaptability. To provide a flexible communication architecture the partially reconfigurable modules were interconnected by a SoCWire Network-on-Chip. However to map an application on this network of exchangeable hardware processing nodes in the FPGA a communication protocol is required. This paper introduces a protocol adapted to the requirements for on-chip data processing chains. The protocol is inspired by the Remote Memory Access Protocol (RMAP), but considerably simplified to limit the FPGA resource consumption for the implementation of a protocol handler, which needs to be instantiated in every single network node. Despite offloading some of the processing into dedicated hardware cores implemented on a FPGA, a data processing unit still has to feature a controlling processor. To connect the Network-on-Chip and the processor, a controlling software complements the hardware protocol handler on the processor side.

Published in:

Adaptive Hardware and Systems (AHS), 2012 NASA/ESA Conference on

Date of Conference:

25-28 June 2012