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Improved Static Desynchronization scheme for Clos-network switches

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2 Author(s)
Che-Hsi Chao ; Dept. of Electr. Eng., Nat. Tsinghua Univ., Hsinchu, Taiwan ; YarSun Hsu

A Clos-network is widely recognized as a scalable switch. Previously proposed dispatching schemes such as concurrent round-robin-based dispatching schemes (CRRD) are able to achieve high throughput. However, speed-up memory and dispatching time are impractical when a switch size is increased. First, this paper presents a novel Memory-Space-Memory (MSM) without speed-up memory. Second, this paper introduces two dispatching schemes. Both schemes are practical to implement because dispatching time is feasible with current technologies. The first is a simple scheme called Static Desynchronization (SD). SD is able to achieve high throughput under uniform traffic by the static desynchronization effect. The second scheme is the Improved Static Desynchronization (ISD) dispatching scheme to overcome the inflexible property of the SD scheme. ISD based on SD is used to develop a medium structure and desynchronized pointers to improve the matching ratio. This study also details how to use the desynchronization effect to obtain 100% throughput under any type of traffic pattern.

Published in:

Computing Technology and Information Management (ICCM), 2012 8th International Conference on  (Volume:2 )

Date of Conference:

24-26 April 2012