By Topic

Picosecond Stopwatches: The Evolution of Time-to-Digital Converters

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)

The measurement of time intervals with high resolution, precision, and stability on a large number of channels has been used in a multitude of large-scale scientific experiments in particle and nuclear physics. In the early 1950s, however, no standard instruments were available to measure time intervals with subnanosecond time resolution for such scientific experiments. The novel Vernier chronotron proposed in the 1950s by Emilio Gatti [1], based on two oscillators at slightly different frequencies, was an important step toward future detectors and instrumentation able to access high-resolution time measurements in the ps domain. During the 1960s and 1970s, further novel time-to-digital converter (TDC) architectures were developed, and several of these were used until the 1980s in standard modular instrumentation modules, including those based on the Nuclear Instrumentation Module (NIM), Computer Automated Measurement and Control (CAMAC), IEEE Fastbus, and Versa Module Eurocard (VME) standards. At the end of the 1980s, the required number of TDC channels in high energy physics (HEP) experiments increased rapidly, reaching the tens <?Pub Caret?>and hundreds of thousands of measurement channels. This gave rise to the development of various fully integrated, multichannel TDC application specified integrated circuits (ASICs) for use in HEP [2], [3].

Published in:

Solid-State Circuits Magazine, IEEE  (Volume:4 ,  Issue: 3 )