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Numerical methods such as the finite element method (FEM) have been used to evaluate the reliability of electronic packages. However, it is difficult to assure the accuracy of numerical analyses of electronic packages, which require nonlinear analyses. In this study, we evaluated the thermal strain of a test chip for three-dimensional stacked integrated circuits (3D SIC) with both measurement and analyses. First, the distribution of thermal strain on the cross-section of the test chip was measured using the digital image correlation method (DICM). Then, the distribution of strain on the surface of a cut test chip was also analyzed by the FEM while considering the viscoelasticity of underfill (UF) resin measured with the stress relaxation test and the elastic-plasticity of components measured with nanoindentation testing. Based on the comparison between the DIC measurements and the FEM analyses, we improved the accuracy of the nonlinear finite element analyses.