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This letter describes a monolithic 3.5-to-6.5 GHz stacked power amplifier (PA) in 2 μm /0.5 μm GaAs HBT-HEMT process. The proposed PA is designed using both HBT and HEMT. Based on a common-emitter (CE) configuration of HBT with a stacked common-gate (CG) configuration of HEMT, a better power performance of 3 dB improvement can be achieved as compared with the conventional CE or common-source amplifier due to high output stacking impedance. By using the proposed method, the stacked PA demonstrates a maximum output power of 29.4 dBm, a compact chip size of 1.5 × 1 mm2, and a maximum power added efficiency (PAE) of 38%. The output power of the proposed PA is higher than 26.5 dBm between 3.5 and 6.5 GHz.