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A general concern in VLSI design is power efficiency. It is indeed very obvious that battery operated equipment, such as handheld cellular phones, laptop computers etc. impose stringent limits on the acceptable power dissipation. The power dissipation of CMOS circuits is determined at different levels. On the system/architecture level, pipelining, replication, retiming, and bit-serial operation can result in power savings . Moreover, new technologies with smaller feature sizes and lower supply voltages contribute to lowering power dissipation. In this paper author used an extra circuitry that is demultiplexer and an ALU design to explain the concept of reducing power consumption. The technique that author has used in this paper is also applicable for other designs like processor or any other real time process designing.