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Ultralow impedance analysis and evaluation of power distribution network for decoupling capacitor embedded interposers of 3-D integrated LSI system

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7 Author(s)
Kikuchi, K. ; NeRI, Nat. Inst. of Adv. Ind. Sci. & Technol. (AIST), Tsukuba, Japan ; Ueda, C. ; Gomyo, T. ; Ookubo, T.
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We evaluated low-impedance power distribution network (PDN) of decoupling capacitor embedded interposers for 3-D integrated LSI system. Measurements are carried out using the developed impedance analyzer system of a wide frequency range for evaluating ultralow impedance, and calculations are carried out using 2.5-D and 3-D finite element method (FEM) electromagnetic field simulator. We fabricated various types of capacitor mounted or capacitor embedded interposers test element group (TEG), such as surface-mounted and embedded chip capacitors, and thin film capacitors on silicon interposers using the same simple design to compare measurement results with calculation ones. As a result, the ultralow impedance evaluation system that has a high measurement dynamic range at the entire measurable frequency band can be realized. Furthermore, by using 2.5-D and 3-D FEM electromagnetic field simulator, it is expected that the accurate and wideband comparative verification of the PDN impedance analysis and evaluation can be realized.

Published in:

Electronic Components and Technology Conference (ECTC), 2012 IEEE 62nd

Date of Conference:

May 29 2012-June 1 2012