Cart (Loading....) | Create Account
Close category search window
 

Development of an optimized power delivery system for 3D IC integration with TSV silicon interposer

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Zhe Li ; Altera Corp., San Jose, CA, USA ; Hong Shi ; Xie, J. ; Rahman, A.

Silicon Interposer with Through Silicon Via (TSV) is a newly developed technology that enables multichip integration and offers great potential to improve system performance with less delay, higher wiring density, and lower power consumption. One challenge of this new technology is to maintain the PDN electrical performance. Micro bumps, TSV, interposer front and back side Re-Distribution Layer (RDL) metallization add additional interfaces and drives up complexity for an optimized PDN design in 3D IC integration. This paper reports on a R&D test vehicle that was developed for engineering evaluation of electrical and physical interfaces through TSV silicon interposer. The test vehicle consisted of a FPGA die side-by-side with its daughter die on a passive silicon interpose. The paper reports TSV loss mechanisms and its performance impacts on Power Delivery Network (PDN). Embedded MIM capacitor is implemented to increase interposer decoupling capacitance (IDC) to improve high speed PDN performance. PDN impedance characteristics are analyzed and evaluated for the interposer-based 3D system combining on-die PDN, interposer power/ground grids, TSV and package/PCB PDN components.

Published in:

Electronic Components and Technology Conference (ECTC), 2012 IEEE 62nd

Date of Conference:

May 29 2012-June 1 2012

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.