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Power and signal integrity co-design for quad flat non-lead package

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4 Author(s)
Guan, S.-W. ; Dept. of Electr. Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan ; Kuo, C.-W. ; Wang, C.-C. ; Kitazawa, T.

The co-design of power and signal integrity issues on a quad flat non-lead (QFN) package is described. A novel decoupling capacitor is achieved by separating the die pad and footprint, coating a solder mask on the footprint and connecting the footprint to the printed circuit board power plane through a via. Large capacitance between power (footprint) and ground (die pad) resulted from the thin mask and large die pad lowering the input impedance of the power delivery network without parasitic effects at low frequency. A power bridge and a ground bridge are introduced to substitute the wire bond to decrease the inductance and hence the impedance magnitude up to 30%, thus enhancing the power integrity at high frequency. A modified design called hybrid power/ground exhibits great signal integrity by providing good reference for signals. The thermal dissipation is also better than the first design through direct contact of the die pad and the footprint ground regions. The overall design demonstrates excellent broadband performance for signal and power integrity.

Published in:

Electronics Letters  (Volume:48 ,  Issue: 15 )

Date of Publication:

July 19 2012

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