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This study presents a novel CMOS-microelectromechanical systems (MEMS) three-axis accelerometer design using Taiwan Semiconductor Manufacturing Company 0.18-μm one-poly-Si six-metal/dielectric CMOS process. The multilayer metal and dielectric stacking features of the CMOS process were exploited to vertically integrate the in-plane and out-of-plane capacitive sensing electrodes. Thus, the three-axis sensing electrodes can be integrated on a single proof mass to reduce the footprint of the accelerometer. Moreover, the fully differential gap-closing sensing electrodes among all three axes are implemented to increase the sensitivities and decrease the noise. The in-plane and out-of-plane sensing gaps are respectively defined by the minimum metal line width and the thickness of one metal layer by means of the metal wet-etching post-CMOS process. Thus, the capacitive sensitivities are further improved. The fully differential gap-closing sensing electrodes also bring the advantage of reduced cross talks between all three axes. As a result, the footprint of the presented three-axis accelerometer structure is only 400 × 400 μm2. Compared with existing commercial or CMOS-MEMS studies, the size is significantly reduced. The measured sensitivities (nonlinearities) are 14.7 mV/G (3.2%) for the X-axis, 15.4 mV/G (1.4%) for the Y-axis, and 14.6 mV/G (2.8%) for the Z-axis.