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Scaling of Trigate Junctionless Nanowire MOSFET With Gate Length Down to 13 nm

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10 Author(s)
S. Barraud ; Commissariat à l'Energie Atomique et aux Energies Alternatives, LETI, Minatec campus, Grenoble, France ; M. Berthome ; R. Coquand ; M. Casse
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In this letter, we report the performance of high-κ /metal gate nanowire (NW) transistors without junctions fabricated with a channel thickness of 9 nm and sub-15-nm gate length and NW width. Near-ideal subthreshold slope (SS) and extremely low leakage currents are demonstrated for ultrascaled gate lengths with a high on-off ratio (Ion/Ioff) >; 106. For the first time, an SS lower than 70 mV/dec is achieved at LG = 13 nm for n-type and p-type transistors, highlighting excellent electrostatic integrity of trigate junctionless NW MOSFETs.

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IEEE Electron Device Letters  (Volume:33 ,  Issue: 9 )